RealView Logic Tile
System-on-Chip Development Made Easy
With high performance and high pin-count interconnect, the RealView Versatile Logic Tiles enable SoC developers to prototype complete systems including off-the-shelf and custom IP. Drivers and test code can be written using the IP. Logic tiles may also be stacked to provide additional design capacity if required.
The Logic Tiles fit onto the Versatile /PB platform board, which supports development with RVDS, RealView RVI (ICE) and RealView RVT (Trace).
System Architecture
Two logic tiles are available, one with an XC2V6000 and another with the larger XC2V8000. Two programmable clock generators are provided on the tile, and the tile can be plugged into the Versatile Platform Baseboard (ARM926EJ-S) and also the Integrator/AP and Integrator/CP using the Logic Tile interface board.
Two 32-bit wide 2 MB ZBT SRAM devices are provided on the logic tile along with 8 MB of flash memory for FPGA configuration data (which currently requires Multi-ICE to reprogram).
The board includes logic tile connectors top and bottom providing 395 interconnect pins to both the tile above and the tile below (128 are common). A pushbutton, 4 DIP switches and 4 general purpose LEDs are provided. The logic tile requires 3.3V and 5V. Logic tiles can be stacked.
Standard Xilinx FPGA tools can be used with Logic Tiles for FPGA development.



